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[mlir][sparse] expose optimization flags to mini pipeline #95158

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12 changes: 12 additions & 0 deletions mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
Original file line number Diff line number Diff line change
Expand Up @@ -462,6 +462,18 @@ def SparsificationAndBufferization : Pass<"sparsification-and-bufferization", "M
"sparse_tensor::SparseTensorDialect",
"vector::VectorDialect"
];
// Important optimization options are made visible to the mini-pipeline
// so that clients can set these (when not using the full pipeline).
let options = [
Option<"vectorLength", "vl", "int32_t", "0",
"Set the vector length (use 0 to disable vectorization)">,
Option<"enableVLAVectorization", "enable-vla-vectorization", "bool", "false",
"Enable vector length agnostic vectorization">,
Option<"enableSIMDIndex32", "enable-simd-index32", "bool", "false",
"Enable i32 indexing into vectors (for efficient gather/scatter)">,
Option<"enableGPULibgen", "enable-gpu-libgen", "bool", "false",
"Enable GPU acceleration by means of direct library calls">,
];
}

#endif // MLIR_DIALECT_SPARSETENSOR_TRANSFORMS_PASSES
Original file line number Diff line number Diff line change
Expand Up @@ -61,20 +61,34 @@ class SparsificationAndBufferizationPass
: public impl::SparsificationAndBufferizationBase<
SparsificationAndBufferizationPass> {
public:
// Private pass options only.
SparsificationAndBufferizationPass(
const bufferization::OneShotBufferizationOptions &bufferizationOptions,
const SparsificationOptions &sparsificationOptions,
bool createSparseDeallocs, bool enableRuntimeLibrary,
bool enableBufferInitialization, unsigned vectorLength,
bool enableVLAVectorization, bool enableSIMDIndex32, bool enableGPULibgen)
bool enableBufferInitialization)
: bufferizationOptions(bufferizationOptions),
sparsificationOptions(sparsificationOptions),
createSparseDeallocs(createSparseDeallocs),
enableRuntimeLibrary(enableRuntimeLibrary),
enableBufferInitialization(enableBufferInitialization),
vectorLength(vectorLength),
enableVLAVectorization(enableVLAVectorization),
enableSIMDIndex32(enableSIMDIndex32), enableGPULibgen(enableGPULibgen) {
enableBufferInitialization(enableBufferInitialization) {}
// Private pass options and visible pass options.
SparsificationAndBufferizationPass(
const bufferization::OneShotBufferizationOptions &bufferizationOptions,
const SparsificationOptions &sparsificationOptions,
bool createSparseDeallocs, bool enableRuntimeLibrary,
bool enableBufferInitialization, unsigned vl, bool vla, bool index32,
bool gpu)
: bufferizationOptions(bufferizationOptions),
sparsificationOptions(sparsificationOptions),
createSparseDeallocs(createSparseDeallocs),
enableRuntimeLibrary(enableRuntimeLibrary),
enableBufferInitialization(enableBufferInitialization) {
// Set the visible pass options explicitly.
vectorLength = vl;
enableVLAVectorization = vla;
enableSIMDIndex32 = index32;
enableGPULibgen = gpu;
}

/// Bufferize all dense ops. This assumes that no further analysis is needed
Expand Down Expand Up @@ -178,10 +192,6 @@ class SparsificationAndBufferizationPass
bool createSparseDeallocs;
bool enableRuntimeLibrary;
bool enableBufferInitialization;
unsigned vectorLength;
bool enableVLAVectorization;
bool enableSIMDIndex32;
bool enableGPULibgen;
};

} // namespace sparse_tensor
Expand Down Expand Up @@ -213,16 +223,13 @@ mlir::getBufferizationOptionsForSparsification(bool analysisOnly) {

std::unique_ptr<mlir::Pass> mlir::createSparsificationAndBufferizationPass() {
SparsificationOptions sparseOptions;
return createSparsificationAndBufferizationPass(
return std::make_unique<
mlir::sparse_tensor::SparsificationAndBufferizationPass>(
getBufferizationOptionsForSparsification(/*analysisOnly=*/false),
sparseOptions,
/*createSparseDeallocs=*/false,
/*enableRuntimeLibrary=*/false,
/*enableBufferInitialization=*/false,
/*vectorLength=*/0,
/*enableVLAVectorization=*/false,
/*enableSIMDIndex32=*/false,
/*enableGPULibgen=*/false);
/*enableBufferInitialization=*/false);
}

std::unique_ptr<mlir::Pass> mlir::createSparsificationAndBufferizationPass(
Expand Down
43 changes: 43 additions & 0 deletions mlir/test/Dialect/SparseTensor/minipipeline_vector.mlir
Original file line number Diff line number Diff line change
@@ -0,0 +1,43 @@
// RUN: mlir-opt %s --sparsification-and-bufferization | FileCheck %s --check-prefix=CHECK-NOVEC
// RUN: mlir-opt %s --sparsification-and-bufferization="vl=8" | FileCheck %s --check-prefix=CHECK-VEC

// Test to ensure we can pass optimization flags into
// the mini sparsification and bufferization pipeline.

#SV = #sparse_tensor.encoding<{ map = (d0) -> (d0 : compressed) }>

#trait_sum_reduction = {
indexing_maps = [
affine_map<(i) -> (i)>, // a
affine_map<(i) -> ()> // x (scalar out)
],
iterator_types = ["reduction"],
doc = "x += SUM_i a(i)"
}

//
// CHECK-NOVEC-LABEL: func.func @sum_reduction
// CHECK-NOVEC: scf.for
// CHECK-NOVEC: arith.addf %{{.*}} %{{.*}} : f32
// CHECK-NOVEC: }
//
// CHECK-VEC-LABEL: func.func @sum_reduction
// CHECK-VEC: vector.insertelement
// CHECK-VEC: scf.for
// CHECK-VEC: vector.create_mask
// CHECK-VEC: vector.maskedload
// CHECK-VEC: arith.addf %{{.*}} %{{.*}} : vector<8xf32>
// CHECK-VEC: }
// CHECK-VEC: vector.reduction <add>
//
func.func @sum_reduction(%arga: tensor<?xf32, #SV>,
%argx: tensor<f32>) -> tensor<f32> {
%0 = linalg.generic #trait_sum_reduction
ins(%arga: tensor<?xf32, #SV>)
outs(%argx: tensor<f32>) {
^bb(%a: f32, %x: f32):
%0 = arith.addf %x, %a : f32
linalg.yield %0 : f32
} -> tensor<f32>
return %0 : tensor<f32>
}
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