[LangRef] Rename 'operand' to 'argument' in descriptions of VP intrinsics. NFC #97437
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…s. NFC Fixes inconsistencies noted in llvm#97386 and llvm#97387. There are still more intrinsics that have the same issue. I might submit more patches for those.
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@llvm/pr-subscribers-llvm-ir Author: Craig Topper (topperc) ChangesFixes inconsistencies noted in #97386 and #97387. There are still more intrinsics that have the same issue. I might submit more patches for those. Patch is 102.53 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/97437.diff 1 Files Affected:
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index b6f8a24937df6..5c67fbd8615a7 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -20064,10 +20064,10 @@ condition vector, without IR-level branching.
Arguments:
""""""""""
-The first operand is a vector of ``i1`` and indicates the condition. The
-second operand is the value that is selected where the condition vector is
-true. The third operand is the value that is selected where the condition
-vector is false. The vectors must be of the same size. The fourth operand is
+The first argument is a vector of ``i1`` and indicates the condition. The
+second argument is the value that is selected where the condition vector is
+true. The third argument is the value that is selected where the condition
+vector is false. The vectors must be of the same size. The fourth argument is
the explicit vector length.
#. The optional ``fast-math flags`` marker indicates that the select has one or
@@ -20079,13 +20079,13 @@ the explicit vector length.
Semantics:
""""""""""
-The intrinsic selects lanes from the second and third operand depending on a
+The intrinsic selects lanes from the second and third argument depending on a
condition vector.
All result lanes at positions greater or equal than ``%evl`` are undefined.
For all lanes below ``%evl`` where the condition vector is true the lane is
-taken from the second operand. Otherwise, the lane is taken from the third
-operand.
+taken from the second argument. Otherwise, the lane is taken from the third
+argument.
Example:
""""""""
@@ -20117,15 +20117,15 @@ Overview:
"""""""""
The '``llvm.vp.merge``' intrinsic is used to choose one value based on a
-condition vector and an index operand, without IR-level branching.
+condition vector and an index argument, without IR-level branching.
Arguments:
""""""""""
-The first operand is a vector of ``i1`` and indicates the condition. The
-second operand is the value that is merged where the condition vector is true.
-The third operand is the value that is selected where the condition vector is
-false or the lane position is greater equal than the pivot. The fourth operand
+The first argument is a vector of ``i1`` and indicates the condition. The
+second argument is the value that is merged where the condition vector is true.
+The third argument is the value that is selected where the condition vector is
+false or the lane position is greater equal than the pivot. The fourth argument
is the pivot.
#. The optional ``fast-math flags`` marker indicates that the merge has one or
@@ -20137,12 +20137,12 @@ is the pivot.
Semantics:
""""""""""
-The intrinsic selects lanes from the second and third operand depending on a
+The intrinsic selects lanes from the second and third argument depending on a
condition vector and pivot value.
For all lanes where the condition vector is true and the lane position is less
-than ``%pivot`` the lane is taken from the second operand. Otherwise, the lane
-is taken from the third operand.
+than ``%pivot`` the lane is taken from the second argument. Otherwise, the lane
+is taken from the third argument.
Example:
""""""""
@@ -20185,16 +20185,16 @@ Predicated integer addition of two vectors of integers.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.add``' intrinsic performs integer addition (:ref:`add <i_add>`)
-of the first and second vector operand on each enabled lane. The result on
+of the first and second vector argument on each enabled lane. The result on
disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20232,16 +20232,16 @@ Predicated integer subtraction of two vectors of integers.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.sub``' intrinsic performs integer subtraction
-(:ref:`sub <i_sub>`) of the first and second vector operand on each enabled
+(:ref:`sub <i_sub>`) of the first and second vector argument on each enabled
lane. The result on disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20281,15 +20281,15 @@ Predicated integer multiplication of two vectors of integers.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.mul``' intrinsic performs integer multiplication
-(:ref:`mul <i_mul>`) of the first and second vector operand on each enabled
+(:ref:`mul <i_mul>`) of the first and second vector argument on each enabled
lane. The result on disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20328,16 +20328,16 @@ Predicated, signed division of two vectors of integers.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.sdiv``' intrinsic performs signed division (:ref:`sdiv <i_sdiv>`)
-of the first and second vector operand on each enabled lane. The result on
+of the first and second vector argument on each enabled lane. The result on
disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20376,13 +20376,16 @@ Predicated, unsigned division of two vectors of integers.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The third operand is the vector mask and has the same number of elements as the result vector type. The fourth operand is the explicit vector length of the operation.
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
+operation.
Semantics:
""""""""""
The '``llvm.vp.udiv``' intrinsic performs unsigned division
-(:ref:`udiv <i_udiv>`) of the first and second vector operand on each enabled
+(:ref:`udiv <i_udiv>`) of the first and second vector argument on each enabled
lane. The result on disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20422,16 +20425,16 @@ Predicated computations of the signed remainder of two integer vectors.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.srem``' intrinsic computes the remainder of the signed division
-(:ref:`srem <i_srem>`) of the first and second vector operand on each enabled
+(:ref:`srem <i_srem>`) of the first and second vector argument on each enabled
lane. The result on disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20471,16 +20474,16 @@ Predicated computation of the unsigned remainder of two integer vectors.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.urem``' intrinsic computes the remainder of the unsigned division
-(:ref:`urem <i_urem>`) of the first and second vector operand on each enabled
+(:ref:`urem <i_urem>`) of the first and second vector argument on each enabled
lane. The result on disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20519,16 +20522,16 @@ Vector-predicated arithmetic right-shift.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.ashr``' intrinsic computes the arithmetic right shift
-(:ref:`ashr <i_ashr>`) of the first operand by the second operand on each
+(:ref:`ashr <i_ashr>`) of the first argument by the second argument on each
enabled lane. The result on disabled lanes is a
:ref:`poison value <poisonvalues>`.
@@ -20569,16 +20572,16 @@ Vector-predicated logical right-shift.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.lshr``' intrinsic computes the logical right shift
-(:ref:`lshr <i_lshr>`) of the first operand by the second operand on each
+(:ref:`lshr <i_lshr>`) of the first argument by the second argument on each
enabled lane. The result on disabled lanes is a
:ref:`poison value <poisonvalues>`.
@@ -20618,16 +20621,16 @@ Vector-predicated left shift.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.shl``' intrinsic computes the left shift (:ref:`shl <i_shl>`) of
-the first operand by the second operand on each enabled lane. The result on
+the first argument by the second argument on each enabled lane. The result on
disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20666,16 +20669,16 @@ Vector-predicated or.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.or``' intrinsic performs a bitwise or (:ref:`or <i_or>`) of the
-first two operands on each enabled lane. The result on disabled lanes is
+first two arguments on each enabled lane. The result on disabled lanes is
a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20714,16 +20717,16 @@ Vector-predicated and.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.and``' intrinsic performs a bitwise and (:ref:`and <i_or>`) of
-the first two operands on each enabled lane. The result on disabled lanes is
+the first two arguments on each enabled lane. The result on disabled lanes is
a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20762,16 +20765,16 @@ Vector-predicated, bitwise xor.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.xor``' intrinsic performs a bitwise xor (:ref:`xor <i_xor>`) of
-the first two operands on each enabled lane.
+the first two arguments on each enabled lane.
The result on disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20809,10 +20812,10 @@ Predicated abs of a vector of integers.
Arguments:
""""""""""
-The first operand and the result have the same vector of integer type. The
-second operand is the vector mask and has the same number of elements as the
-result vector type. The third operand is the explicit vector length of the
-operation. The fourth operand must be a constant and is a flag to indicate
+The first argument and the result have the same vector of integer type. The
+second argument is the vector mask and has the same number of elements as the
+result vector type. The third argument is the explicit vector length of the
+operation. The fourth argument must be a constant and is a flag to indicate
whether the result value of the '``llvm.vp.abs``' intrinsic is a
:ref:`poison value <poisonvalues>` if the first argument is statically or
dynamically an ``INT_MIN`` value.
@@ -20820,7 +20823,7 @@ dynamically an ``INT_MIN`` value.
Semantics:
""""""""""
-The '``llvm.vp.abs``' intrinsic performs abs (:ref:`abs <int_abs>`) of the first operand on each
+The '``llvm.vp.abs``' intrinsic performs abs (:ref:`abs <int_abs>`) of the first argument on each
enabled lane. The result on disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20860,16 +20863,16 @@ Predicated integer signed maximum of two vectors of integers.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.smax``' intrinsic performs integer signed maximum (:ref:`smax <int_smax>`)
-of the first and second vector operand on each enabled lane. The result on
+of the first and second vector argument on each enabled lane. The result on
disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20908,16 +20911,16 @@ Predicated integer signed minimum of two vectors of integers.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.smin``' intrinsic performs integer signed minimum (:ref:`smin <int_smin>`)
-of the first and second vector operand on each enabled lane. The result on
+of the first and second vector argument on each enabled lane. The result on
disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -20956,16 +20959,16 @@ Predicated integer unsigned maximum of two vectors of integers.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.umax``' intrinsic performs integer unsigned maximum (:ref:`umax <int_umax>`)
-of the first and second vector operand on each enabled lane. The result on
+of the first and second vector argument on each enabled lane. The result on
disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -21004,16 +21007,16 @@ Predicated integer unsigned minimum of two vectors of integers.
Arguments:
""""""""""
-The first two operands and the result have the same vector of integer type. The
-third operand is the vector mask and has the same number of elements as the
-result vector type. The fourth operand is the explicit vector length of the
+The first two arguments and the result have the same vector of integer type. The
+third argument is the vector mask and has the same number of elements as the
+result vector type. The fourth argument is the explicit vector length of the
operation.
Semantics:
""""""""""
The '``llvm.vp.umin``' intrinsic performs integer unsigned minimum (:ref:`umin <int_umin>`)
-of the first and second vector operand on each enabled lane. The result on
+of the first and second vector argument on each enabled lane. The result on
disabled lanes is a :ref:`poison value <poisonvalues>`.
Examples:
@@ -21052,16 +21055,16 @@ Predicated floating-point copysign of two vectors of floating-point values.
Arguments:
""""""""""
-The first two operands and the result have the same vector of floating-point type. The
-third operand is the vector mask and has the same number of elements as the
-r...
[truncated]
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frasercrmck
approved these changes
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Generally seems like a good idea, thanks. Only the llvm.experimental.gc.* intrinsics seem to explicitly label their sub-section "Operands". That can maybe be cleaned up too, in a separate PR, for consistency.
I'm still a bit surprised that instructions have "arguments" but that's personal preference.
| The first three operand and the result have the same vector of integer type. The | ||
| fourth operand is the vector mask and has the same number of elements as the | ||
| result vector type. The fifth operand is the explicit vector length of the | ||
| The first three argument and the result have the same vector of integer type. The |
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typo (inherited from the original): arguments. There's a few other places where this occurs.
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…oad/store/gather/scatter. NFC Following renaming started in llvm#97437.
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changed the title
frasercrmck
reviewed
Jul 2, 2024
| operation. | ||
|
|
||
| Semantics: | ||
| """""""""" | ||
|
|
||
| The '``llvm.vp.urem``' intrinsic computes the remainder of the unsigned division | ||
| (:ref:`urem <i_urem>`) of the first and second vector operand on each enabled | ||
| (:ref:`urem <i_urem>`) of the first and second vector argument on each enabled |
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sorry, just spotted another: first and second vector arguments.
nikic
approved these changes
Jul 2, 2024
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…sics. NFC (llvm#97437) Fixes inconsistencies noted in llvm#97386 and llvm#97387. There are still more intrinsics that have the same issue. I might submit more patches for those.
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…oad/store/gather/scatter. NFC (llvm#97440) Following up on the renaming started in llvm#97437.
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… intrinsics. NFC (llvm#97462) Continues the renaming started in llvm#97437.
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…sics. NFC (llvm#97437) Fixes inconsistencies noted in llvm#97386 and llvm#97387. There are still more intrinsics that have the same issue. I might submit more patches for those.
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…oad/store/gather/scatter. NFC (llvm#97440) Following up on the renaming started in llvm#97437.
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… intrinsics. NFC (llvm#97462) Continues the renaming started in llvm#97437.
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Fixes inconsistencies noted in #97386 and #97387.
There are still more intrinsics that have the same issue. I might submit more patches for those.