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Add max_interleaving DPC++ FPGA tutorial #171
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Add max_interleaving DPC++FPGA tutorial
This looks good to me. thank you. |
Your code is written for DPC++ compiler beta10 version. However, we require backwards compatibility with the beta09 compiler until the beta10 version is formally released. Please add the following code for backwards compatability:
You can refer to #167 to see an example of this. |
add backwards compatibility with the beta09 compiler
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Missing header file location comment above "dpc_common.hpp"
DirectProgramming/DPC++FPGA/Tutorials/Features/max_interleaving/src/max_interleaving.cpp
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DirectProgramming/DPC++FPGA/Tutorials/Features/max_interleaving/src/max_interleaving.cpp
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add the comment for #include "dpc_common.hpp" and change the includes in alphetical order
DirectProgramming/DPC++FPGA/Tutorials/Features/max_interleaving/src/max_interleaving.cpp
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You should not be including <CL/sycl.hpp> twice.
remove the extra include of CL/sycl.hpp
Windows CI failed -- looks like a basic copy-paste error. Please update your ninja file to reference the correct files! |
Approved to re-launch the CI test |
I have tested the windows flow locally, adding an explicit scope to the sqrt function fix the failures on windows. |
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Let's retrigger the CI test to see whether the sqrt issue is resolved.
Paul's comment is addressed, Tom is satisfied with the README, and CI is passing -- I think we're good to go! |
Add max_interleaving DPC++FPGA tutorial
Description
This tutorial demonstrates how to apply the max_interleaving attribute to loops and how it affects loop resource use.
Fixes # (issue)
Type of change
Please delete options that are not relevant. Add a 'X' to the one that is applicable.
How Has This Been Tested?
Please describe the tests that you ran to verify your changes. Provide instructions so we can reproduce. Please also list any relevant details for your test configuration