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Arm backend: Convert asserts to raise errors in op_mul #10134

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Merged
merged 2 commits into from
Apr 22, 2025
Merged

Arm backend: Convert asserts to raise errors in op_mul #10134

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34f806e
Arm backend: Convert asserts to raise errors in op_mul
Sebastian-Larsson Apr 11, 2025
9346057
Merge branch 'main' into assert_mul
oscarandersson8218 Apr 16, 2025
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10 changes: 9 additions & 1 deletion backends/arm/operators/op_mul.py
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Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,15 @@ def define_node(
inputs: List[TosaArg],
output: TosaArg,
) -> None:
assert inputs[0].dtype == inputs[1].dtype == output.dtype == ts.DType.INT8
if (
inputs[0].dtype != ts.DType.INT8
or inputs[1].dtype != ts.DType.INT8
or output.dtype != ts.DType.INT8
):
raise ValueError(
f"Inputs and output for {self.target} need to be INT8, got "
f"{inputs[0].dtype=}, {inputs[1].dtype=} and {output.dtype=}"
)

dim_order = (
inputs[0].dim_order
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