[stdlib] Added RISCV64 support

CMakeLists.txt

@@ -762,6 +762,8 @@ else()
     set(SWIFT_HOST_VARIANT_ARCH_default "i686")
   elseif("${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "wasm32")
     set(SWIFT_HOST_VARIANT_ARCH_default "wasm32")
+  elseif("${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "riscv64")
+    set(SWIFT_HOST_VARIANT_ARCH_default "riscv64")
   else()
     message(FATAL_ERROR "Unrecognized architecture on host system: ${CMAKE_SYSTEM_PROCESSOR}")
   endif()

cmake/modules/SwiftSetIfArchBitness.cmake

@@ -25,7 +25,8 @@ function(set_if_arch_bitness var_name)
          "${SIA_ARCH}" STREQUAL "aarch64" OR
          "${SIA_ARCH}" STREQUAL "powerpc64" OR
          "${SIA_ARCH}" STREQUAL "powerpc64le" OR
-         "${SIA_ARCH}" STREQUAL "s390x")
+         "${SIA_ARCH}" STREQUAL "s390x" OR
+         "${SIA_ARCH}" STREQUAL "riscv64")
     set("${var_name}" "${SIA_CASE_64_BIT}" PARENT_SCOPE)
   else()
     message(FATAL_ERROR "Unknown architecture: ${SIA_ARCH}")

lib/Basic/LangOptions.cpp

@@ -67,6 +67,7 @@ static const SupportedConditionalValue SupportedConditionalCompilationArches[] =
   "powerpc64le",
   "s390x",
   "wasm32",
+  "riscv64",
 };
 
 static const SupportedConditionalValue SupportedConditionalCompilationEndianness[] = {
@@ -316,6 +317,9 @@ std::pair<bool, bool> LangOptions::setTarget(llvm::Triple triple) {
   case llvm::Triple::ArchType::ppc:
     addPlatformConditionValue(PlatformConditionKind::Arch, "powerpc");
     break;
+  case llvm::Triple::ArchType::riscv64:
+    addPlatformConditionValue(PlatformConditionKind::Arch, "riscv64");
+    break;
   case llvm::Triple::ArchType::ppc64:
     addPlatformConditionValue(PlatformConditionKind::Arch, "powerpc64");
     break;
@@ -350,6 +354,7 @@ std::pair<bool, bool> LangOptions::setTarget(llvm::Triple triple) {
   case llvm::Triple::ArchType::aarch64_32:
   case llvm::Triple::ArchType::ppc64le:
   case llvm::Triple::ArchType::wasm32:
+  case llvm::Triple::ArchType::riscv64:
   case llvm::Triple::ArchType::x86:
   case llvm::Triple::ArchType::x86_64:
     addPlatformConditionValue(PlatformConditionKind::Endianness, "little");

stdlib/cmake/modules/SwiftSource.cmake

@@ -549,6 +549,10 @@ function(_compile_swift_files
 
   list(APPEND swift_flags ${SWIFT_STDLIB_EXTRA_SWIFT_COMPILE_FLAGS})
 
+  if(CFLAGS_ARCH STREQUAL "riscv64")
+     list(APPEND swift_flags "-Xcc" "-mno-relax")
+  endif()
+
   list(APPEND swift_flags ${SWIFT_EXPERIMENTAL_EXTRA_FLAGS})
 
   if(SWIFTFILE_OPT_FLAGS)

stdlib/public/core/AtomicInt.swift.gyb

@@ -68,7 +68,7 @@ internal func _swift_stdlib_atomicCompareExchangeStrongInt(
 #if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32) || arch(powerpc)
   let (oldValue, won) = Builtin.cmpxchg_seqcst_seqcst_Int32(
     target._rawValue, expected.pointee._value, desired._value)
-#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x)
+#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x) || arch(riscv64)
   let (oldValue, won) = Builtin.cmpxchg_seqcst_seqcst_Int64(
     target._rawValue, expected.pointee._value, desired._value)
 #endif
@@ -85,7 +85,7 @@ func _swift_stdlib_atomicLoadInt(
 #if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32) || arch(powerpc)
   let value = Builtin.atomicload_seqcst_Int32(target._rawValue)
   return Int(value)
-#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x)
+#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x) || arch(riscv64)
   let value = Builtin.atomicload_seqcst_Int64(target._rawValue)
   return Int(value)
 #endif
@@ -97,7 +97,7 @@ internal func _swift_stdlib_atomicStoreInt(
   desired: Int) {
 #if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32) || arch(powerpc)
   Builtin.atomicstore_seqcst_Int32(target._rawValue, desired._value)
-#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x)
+#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x) || arch(riscv64)
   Builtin.atomicstore_seqcst_Int64(target._rawValue, desired._value)
 #endif
 }
@@ -115,7 +115,7 @@ func _swift_stdlib_atomicFetch${operation}Int(
   let value = _swift_stdlib_atomicFetch${operation}Int32(
     object: rawTarget.assumingMemoryBound(to: Int32.self),
     operand: Int32(operand))
-#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x)
+#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x) || arch(riscv64)
   let value = _swift_stdlib_atomicFetch${operation}Int64(
     object: rawTarget.assumingMemoryBound(to: Int64.self),
     operand: Int64(operand))

stdlib/public/core/Builtin.swift

@@ -395,7 +395,7 @@ internal var _objectPointerLowSpareBitShift: UInt {
 }
 
 #if arch(i386) || arch(arm) || arch(wasm32) || arch(powerpc) || arch(powerpc64) || arch(
-  powerpc64le) || arch(s390x) || arch(arm64_32)
+  powerpc64le) || arch(s390x) || arch(arm64_32) || arch(riscv64)
 @inlinable
 internal var _objectPointerIsObjCBit: UInt {
     @inline(__always) get { return 0x0000_0002 }

stdlib/public/runtime/Float16Support.cpp

@@ -29,8 +29,8 @@
 
 // Android NDK <r21 do not provide `__aeabi_d2h` in the compiler runtime,
 // provide shims in that case.
-#if (defined(__ANDROID__) && defined(__ARM_ARCH_7A__) && defined(__ARM_EABI__)) || \
-  ((defined(__i386__) || defined(__i686__) || defined(__x86_64__)) && !defined(__APPLE__))
+#if ((defined(__ANDROID__) || defined(__linux__)) && defined(__arm__)) || \
+  ((defined(__i386__) || defined(__i686__) || defined(__x86_64__) || defined(__riscv)) && !defined(__APPLE__))
 
 #include "../SwiftShims/Visibility.h"
 

stdlib/public/runtime/HeapObject.cpp

@@ -66,7 +66,7 @@ static inline bool isValidPointerForNativeRetain(const void *p) {
   // arm64_32 is special since it has 32-bit pointers but __arm64__ is true.
   // Catch it early since __POINTER_WIDTH__ is generally non-portable.
   return p != nullptr;
-#elif defined(__x86_64__) || defined(__arm64__) || defined(__aarch64__) || defined(_M_ARM64) || defined(__s390x__) || (defined(__powerpc64__) && defined(__LITTLE_ENDIAN__))
+#elif defined(__x86_64__) || defined(__arm64__) || defined(__aarch64__) || defined(_M_ARM64) || defined(__s390x__) || (defined(__powerpc64__) && defined(__LITTLE_ENDIAN__)) || defined(__riscv)
   // On these platforms, except s390x, the upper half of address space is reserved for the
   // kernel, so we can assume that pointer values in this range are invalid.
   // On s390x it is theoretically possible to have high bit set but in practice

stdlib/public/stubs/MathStubs.cpp

@@ -64,6 +64,7 @@ extern "C" {
     (defined(__linux__) && defined(__aarch64__)) || \
     (defined(__linux__) && defined(__powerpc64__)) || \
     (defined(__linux__) && defined(__s390x__)) || \
+    (defined(__linux__) && defined(__riscv)) || \
     (defined(__ANDROID__) && defined(__aarch64__))
 
 SWIFT_RUNTIME_STDLIB_API

utils/build-presets.ini

@@ -865,6 +865,7 @@ relocate-xdg-cache-home-under-build-subdir
 [preset: buildbot_linux]
 mixin-preset=mixin_linux_installation
 build-subdir=buildbot_linux
+llvm-targets-to-build=X86;ARM;AArch64;PowerPC;SystemZ;Mips;RISCV
 lldb
 release
 test
@@ -1459,7 +1460,7 @@ mixin-preset=
 [preset: LLDB_Nested]
 skip-build-benchmarks
 install-destdir=%(swift_install_destdir)s
-llvm-targets-to-build=X86;ARM;AArch64;PowerPC;SystemZ;Mips
+llvm-targets-to-build=X86;ARM;AArch64;PowerPC;SystemZ;Mips;RISCV
 
 [preset: LLDB_Swift_DebugAssert]
 mixin-preset=