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DISCO_H747I: add support of MBED_TICKLESS #11950

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Merged
merged 6 commits into from
Nov 29, 2019

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ABOSTM
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@ABOSTM ABOSTM commented Nov 26, 2019

Description

Summary of change

  • Add support of TICKLESS for STM32 DISCO_H747I. Valid for both core CM4 and CM7.
  • rework sleep management to be compatible with all STM32 families.
  • Align H7 cube HAL RCC with other STM32 families.

Pull request type

[] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[x] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[] Covered by existing mbed-os tests (Greentea or Unittest)
[x] Tests / results supplied as part of this PR

Test executed on ST automatic bench:

  • L0, L1, L4, F0,F1,F2, F3, F4, F7, H7 and WB with GCC_ARM
    tests-mbed_drivers-lp_ticker,tests-mbed_drivers-lp_timeout,tests-mbed_drivers-lp_timer,tests-mbed_drivers-rtc,tests-mbed_drivers-sleep_lock,tests-mbed_drivers-ticker,tests-mbed_drivers-timeout,tests-mbed_drivers-timer,tests-mbed_drivers-timerevent,tests-mbed_hal-common_tickers,tests-mbed_hal-common_tickers_freq,tests-mbed_hal-lp_ticker,tests-mbed_hal-rtc,tests-mbed_hal-rtc_reset,tests-mbed_hal-rtc_time,tests-mbed_hal-rtc_time_conv,tests-mbed_hal-sleep,tests-mbed_hal-sleep_manager,tests-mbed_hal-sleep_manager_racecondition,tests-mbed_hal-ticker,tests-mbed_hal-us_ticker,tests-mbed_platform-wait_ns,tests-mbedmicro-rtos-mbed-kernel_tick_count,tests-mbedmicro-rtos-mbed-rtostimer,tests-mbedmicro-rtos-mbed-systimer

All tests are PASSED except for tests-mbed_hal-sleep_manager on some F0, L0 and F4 board: see my comment on #11721
This test, tests-mbed_hal-sleep_manager, is passed with PR #11956

  • DISCO_H747I with GCC_ARM all tests PASSED

@ciarmcom ciarmcom requested review from a team November 26, 2019 20:00
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@ABOSTM, thank you for your changes.
@ARMmbed/mbed-os-maintainers @ARMmbed/mbed-os-tools @ARMmbed/mbed-os-crypto please review.

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ABOSTM commented Nov 27, 2019

@LMESTM can you please have a look?

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@LMESTM LMESTM left a comment

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Minor question, otherwise LGTM

}
LL_HSEM_ReleaseLock(HSEM, CFG_HW_RCC_SEMID, HSEM_CR_COREID_CURRENT);
#if defined(CORE_CM7)
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Isn't there a define for CPU1 / CPU2 ?
just in case another DUAL_CORE than H7 may have another split ...

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No, there is no such defined.
I entered an internal change request:
ST_INTERNAL_REF 76709

LL_HSEM_ReleaseLock(HSEM, CFG_HW_RCC_SEMID, HSEM_CR_COREID_CURRENT);
#if defined(CORE_CM7)
LL_PWR_ClearFlag_CPU();
#elif defined(CORE_CM4)
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same

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@mark-edgeworth mark-edgeworth left a comment

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No objections from tools.

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0xc0170 commented Nov 27, 2019

@ABOSTM There's a conflict now, please resolve

With tickless mechanism hsem can be used for quite a long time
(time to set up PLL clock).
Also, if hsem is held to long, then this is not the current core which is faulty,
but probably the other (the one which hold the HSEM)
port fix ARMmbed#5896 on STM32H7 Cube HAL
ST internal ticket 42806 not yet released for STM32H7
@ABOSTM ABOSTM force-pushed the DISCO_H747I_TICKLESS branch from fb91d0a to 42a0407 Compare November 27, 2019 13:28
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ABOSTM commented Nov 27, 2019

Conflict fixed.

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0xc0170 commented Nov 28, 2019

CI started

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Changes to AES ALT implementation OK

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mbed-ci commented Nov 28, 2019

Test run: SUCCESS

Summary: 12 of 12 test jobs passed
Build number : 1
Build artifacts

@0xc0170 0xc0170 merged commit 7177d8f into ARMmbed:master Nov 29, 2019
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7 participants