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ADI: compatible code for iar, gcc_arm, armc6 #5560

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li-ho
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@li-ho li-ho commented Nov 22, 2017

Description

compatible code for IAR 8.2, GCC_ARM 6, Keil ARM 6.9

Status

READY

Migrations

NO

Related PRs

master | #5541

Todos

  • Tests

Steps to test or reproduce

mbed config -G ARM_PATH "C:\Keil_v5\ARM\ARMCLANG\bin"
mbed config -G GCC_ARM_PATH "C:\Program Files (x86)\GNU Tools ARM Embedded\6 2017-q2-update\bin"
mbed config -G IAR_PATH "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm"
mbed test -t arm -m EV_COG_AD4050LZ
mbed test -t iar -m EV_COG_AD4050LZ
mbed test -t gcc_arm -m EV_COG_AD4050LZ
mbed test -t arm -m EV_COG_AD3029LZ
mbed test -t iar -m EV_COG_AD3029LZ
mbed test -t gcc_arm -m EV_COG_AD3029LZ

@0xc0170
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0xc0170 commented Nov 23, 2017

@li-ho Something went wrong with the rebase (conflicts + commits from master)

@theotherjimmy Shall the the feature armc6 branch be rebased?

@li-ho li-ho changed the title ADI: compatible code for iar, gcc_arm, armc6 and armc5 ADI: compatible code for iar, gcc_arm, armc6 Nov 24, 2017
@li-ho
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li-ho commented Nov 24, 2017

offline test results attached
test-ev-cog-arm6-iar8-gcc6.zip

@0xc0170
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0xc0170 commented Nov 24, 2017

Can you please fix your branch to be on top of feature-armc6, not also master (I believe that is a reason for all these commits here)

dave-wu and others added 18 commits November 25, 2017 22:19
- Removed unneeded code from i2c and serial modules.
…ady;

- Added a configuration call in trng_init to make sure the TRNG buffering mode is disabled, so only 8-bit bytes are returned;
- Moved the TRNG device handle into the trng_t structure;
- Fixed some formatting errors in the adc driver.
- Added curly brackets to single line conditions in gpio_qpi.c and gpio_irq_api.c;
- Changed rx and tx buffers in serial module as local variables;
- Minor i2c & spi updates for github pull request;
- Added function definition for spi_master_block_write.
…ter_block_write; - Some clean up in serai_api.
trng_get_bytes;
- Removed lp ticker as it does not satisfy the requirements of the lp
timer.
…icking up the ignored files;

- Added #includes in BSP data C files so they can be built on their own without mbedignore;
Fixed issues raised from ARM PR review and removed the unsupported platform.

- Fixed an issue where the TRNG is read even though it may not be ready;
- Added configuration to ensure the buffering mode is disabled so only 8-bit bytes are generated;
- Moved the TRNG device handle into the trng_t structure.

Removed undefined spi slave related functions.

- Added error checking for trng_get_bytes function;
- Added curly brackets to single line conditions for some files;
- Changed rx and tx buffers in serial module as local variables;
- Removed some unused code and some minor formatting corrections;
- Minor i2c & spi updates for github pull request;
- Added function definition for spi_master_block_write.

Added default delay and sample times for the ADC during initialization.

- Added code to clear stack variable in trng_get_bytes upon exiting the
function;
- Remove lp ticker functionality as the timer hardware does not satisfy
lp timer requirements.

Added a check for the STUCK bit before reading the RNG data register to ensure there are no hardware faults.

- Removed .mbedignore to work around some exporter issues;
- Added #includes to some of the driver data C files for them to build on their own.
@li-ho
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li-ho commented Nov 27, 2017

@0xc0170 Those conflicts on top of feature-armc6 are resolved. If there's no other issue, please share your online test results.

@theotherjimmy
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@li-ho Do you need me to bring branch feature-armc6 up to the latest master?

@li-ho
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li-ho commented Nov 27, 2017

@theotherjimmy Current master branch allows ARM 5 and ARM 6 as 2 separate toolchains. Current feature-armc6 branch allows ARM 6 and disallows ARM 5. I will need you to bring feature-armc6 up to master when it has to.

 - Maintain compatible code for ARM 5 and ARM 6 while default alignment settings differ.
 - Instance memory containing memory pointers must be 4 byte aligned for all compilers regardless compilers' settings or configurations.
 - uint32_t is recommended to replace uint8_t for instance memory declaration because uint32_t guarantee 4 byte alignment.
@theotherjimmy
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@li-ho Several things:

  • it looks like this contains many fixes not related to armc6, so feature-armc6 may not be the best target
  • We use Arm Compiler 6.7.0, not 6.9.
  • is there a reason that you need Armc6 only?

@li-ho
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li-ho commented Nov 30, 2017

@theotherjimmy

  • All the changes are required for ARM 5 and 6, IAR 7 and 8, GCC 5 and 6. The "core" of EV_COG_AD4050LZ has to be Cortex-M4F to get full passes. Cortex-M4 for EV_COG_AD4050LZ cannot pass.

  • The code has been tested with MDK5.24a (6.7), DS-5 5.27 (6.8) and MDR5.25pre (6.9) subject to licence availability from different computer.

  • I prefer to provide both ARM 5 and ARM 6 options, and let user choose.

@0xc0170 should this be in master branch or feature-armc6 branch?

@theotherjimmy
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@li-ho

I prefer to provide both ARM 5 and ARM 6 options, and let user choose.

Then direct this PR to master. Sorry for the confusion.

@li-ho
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li-ho commented Nov 30, 2017

#5627 is opened for armmbed::master.

@li-ho li-ho closed this Nov 30, 2017
@sg- sg- removed the needs: work label Nov 30, 2017
@theotherjimmy theotherjimmy changed the base branch from feature-armc6 to master November 30, 2017 23:07
@theotherjimmy
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@li-ho Please re-open this PR. I have changed the base branch to master

@li-ho
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li-ho commented Nov 30, 2017

I cannot reopen this pr. Sorry, I didn't notice the base branch can be changeable in the same pr.

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5 participants