[SYCL] Add new spellings for SYCL FPGA attributes

[smanna12]

Currently, there is a mismatch between our namespace in SYCL (which use intel::)
and the prefixes we use for attributes in LLVM.

This patch updates the attribute spellings that currently use
intelfpga:: prefixes to intel:: in all lowercase and no change for the attribute spelling that use intel:: prefixes.

The patches make this in a three step change:

1. Enable the intel:: prefix, without disabling the older versions.
2. Provide a deprecation warning for the older versions.
3. Disable intelfpga:: versions.

The affected attributes are:

•intelfpga::num_simd_work_items
•intelfpga::max_work_group_size
•intelfpga::max_global_work_dim
•intelfpga::no_global_work_offset
•intelfpga::ivdep
•intelfpga::ii
•intelfpga::max_concurrency
•intelfpga::loop_coalesce
•intelfpga::disable_loop_pipelining
•intelfpga::max_interleaving
•intelfpga::speculated_iterations
•intelfpga::doublepump
•intelfpga::singlepump
•intelfpga::memory
•intelfpga::register
•intelfpga::bankwidth
•intelfpga::numbanks
•intelfpga::private_copies
•intelfpga::merge
•intelfpga::max_replicates
•intelfpga::simple_dual_port
•intelfpga::bank_bits
•intelfpga::force_pow2_depth

1. Additionally, the patches renames spelling for the following two attributes:

•intelfpga::memory -> intel::fpga_memory
•intelfpga::register -> intel::fpga_register

2. Modify the tests and documentation.

Signed-off-by: Soumi Manna [email protected]

[keryell]

I think that the SYCL committee went back in the other direction last week: https://gitlab.khronos.org/sycl/Specification/-/merge_requests/537

Lowercase looks more like C++ and less like C macros.

[Fznamznon]

I think that the SYCL committee went back in the other direction last week: https://gitlab.khronos.org/sycl/Specification/-/merge_requests/537

Lowercase looks more like C++ and less like C macros.

@jbrodman could you please comment on this?

[erichkeane]

Code looks fine, @jbrodman / @mkinsner need to comment on this, our feature request was given telling us to do all capitals, but if the spec changed we should use this opportunity to go back to lowercase.

[keryell]

By the way, @erichkeane since Intel is more motivated than me to have attributes everywhere (even if for any FPGA companies, it looks like any problem is solved by adding a #pragma or an attribute :-) ), would you be kind enough to write a paper for ISO C++23 to have multiple levels of namespace in the attributes, such as allowing things like [[sycl::intel::num_simd_work_items]]. Right now only 1 level is allowed.

[erichkeane]

By the way, @erichkeane since Intel is more motivated than me to have attributes everywhere (even if for any FPGA companies, it looks like any problem is solved by adding a #pragma or an attribute :-) ), would you be kind enough to write a paper for ISO C++23 to have multiple levels of namespace in the attributes, such as allowing things like [[sycl::intel::num_simd_work_items]]. Right now only 1 level is allowed.

Not a bad idea. We're about to have someone on board who can help with that, and is an attribute expert (and managed it through WG14), so I'll see what he thinks.

[smanna12]

Code looks fine, @jbrodman / @mkinsner need to comment on this, our feature request was given telling us to do all capitals, but if the spec changed we should use this opportunity to go back to lowercase.

@mkinsner could you please comment on this? Should we bring the fpga specific ones under lowercase intel:: now?

[mkinsner]

Code looks fine, @jbrodman / @mkinsner need to comment on this, our feature request was given telling us to do all capitals, but if the spec changed we should use this opportunity to go back to lowercase.

@mkinsner could you please comment on this? Should we bring the fpga specific ones under lowercase intel:: now?

Probably, but some details are being settled. Please contact me offline.

[mkinsner]

By the way, @erichkeane since Intel is more motivated than me to have attributes everywhere

A number of these extensions should migrate to non-attribute representations, with attributes like these used to implement the abstraction behind the scenes when appropriate. I think that these should be a stepping stone. I've been pushing the non-attribute style internally within Intel FPGA recently.

[smanna12]

I have updated patch (renaming intelfpga -> intel:: and no change for intel:: attribute spelling) and summary above based on the discussion offline with @erichkeane @mkinsner @jbrodman.

[Fznamznon]

LGTM overall, except small style nits.

[erichkeane]

This looks fine as it is, though if we find ourselves wanting to do this MORE (that is, deprecating spellings), I think we should have a very significant look into adding a 'deprecated spelling' tag into Attr.td that gets taken care of automatically in the attribute infrastructure. I don't know of any attributes (@AaronBallman ??) that currently have any spelling 'deprecated' in our upstream, but it is likely a good idea to keep an eye out for that opportunity.

[AaronBallman]

This looks fine as it is, though if we find ourselves wanting to do this MORE (that is, deprecating spellings), I think we should have a very significant look into adding a 'deprecated spelling' tag into Attr.td that gets taken care of automatically in the attribute infrastructure. I don't know of any attributes (@AaronBallman ??) that currently have any spelling 'deprecated' in our upstream, but it is likely a good idea to keep an eye out for that opportunity.

We have a few attributes that have deprecated spellings. For instance, the swift_wrapper spelling in https://github.com/llvm/llvm-project/blob/master/clang/include/clang/Basic/Attr.td#L2179 is a deprecated spelling that was recently added. IIRC, some of the thread safety annotations also have alternate spellings that may be deprecated-ish (or may just be discouraged as older spellings, I'd have to research it).

[smanna12]

Thank you everyone for the reviews.

[smanna12]

@bader, All BuildBot tests are completed and this PR is ready for your review/merge. Thanks.

[bader]

Thanks!