U-BLOX_C030: Default XTAL is now 12MHz onboard. Option to use Debug 8MHz #4133
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XTAL by using Macro USE_DEBUG_8MHz_XTAL
0xc0170
reviewed
Apr 10, 2017
| "inherits": ["Target"], | ||
| "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "RTC", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"], |
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Remove spaces as separate commit, fine for now, but should be done separately, as its not related to the adding HSE_VALUE in this file
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Result: FAILUREYour command has finished executing! Here's what you wrote!
OutputExample Build failed! |
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Result: SUCCESSYour command has finished executing! Here's what you wrote!
OutputAll builds and test passed! |
aisair
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Ports for Upcoming Targets Fixes and Changes 4008: [NUC472/M453] Support Bootloader and FlashIAP ARMmbed/mbed-os#4008 4102: Add SCL and SDA defs for I2C[0-2]; redefine I2C_[SCL,SDA] to I2C2 ARMmbed/mbed-os#4102 4118: STM32F4 Internal ADC channels rework ARMmbed/mbed-os#4118 4126: STM32F4 : remove SERIAL_TX and SERIAL_RX from available pins ARMmbed/mbed-os#4126 4148: Revert "STM32F4 Internal ADC channels rework" ARMmbed/mbed-os#4148 4152: STM32F4 Internal ADC channels rework ARMmbed/mbed-os#4152 4074: [Silicon Labs] Update pinout ARMmbed/mbed-os#4074 4133: U-BLOX_C030: Default XTAL is now 12MHz onboard. Option to use Debug 8MHz ARMmbed/mbed-os#4133 4142: EFM32: Fixed `pwmout_all_inactive` being inversed ARMmbed/mbed-os#4142 4016: [NRF5]: fix rtc overflow-while-set-timestamp issue ARMmbed/mbed-os#4016 4031: STM32 increase IAR heap size for big RAM targets ARMmbed/mbed-os#4031 4137: MCUXpresso: Update ARM linker files to eliminate reserving RAM for stack & heap ARMmbed/mbed-os#4137 4176: STM32L4 Internal ADC channels rework ARMmbed/mbed-os#4176 4154: STM32F7 Internal ADC channels rework ARMmbed/mbed-os#4154 4174: [NRF52840]: fix rtc overflow-while-set-timestamp issue ARMmbed/mbed-os#4174 4180: [UBLOX_C030] create target hierarchy for the specific versions of the C030 board ARMmbed/mbed-os#4180 4153: STM32F2: Internal ADC channels rework ARMmbed/mbed-os#4153
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XTAL by using Macro USE_DEBUG_8MHz_XTAL
HSE is now set to 12MHz and the PLL default is 12MHz. This is because all hardware will work from local crystal and not the 8MHz debug chip clock.
Created a new Macro USE_DEBUG_8MHz_XTAL to switch back to the 8MHz debug chip clock if the user wishes.