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merged 1 commit into from
Mar 14, 2025
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AMDGPU: Replace more undef test pointer uses with poison #131102

merged 1 commit into from
Mar 14, 2025

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@arsenm arsenm commented Mar 13, 2025

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arsenm commented Mar 13, 2025 •
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llvmbot commented Mar 13, 2025 •
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@llvm/pr-subscribers-backend-amdgpu

@llvm/pr-subscribers-llvm-globalisel

Author: Matt Arsenault (arsenm)

Changes

Patch is 227.52 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/131102.diff

19 Files Affected:

  • (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-divrem.mir (+4-4)
  • (modified) llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir (+2-2)
  • (modified) llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir (+1-1)
  • (modified) llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir (+85-85)
  • (modified) llvm/test/CodeGen/AMDGPU/fp-atomic-to-s_denormmode.mir (+32-32)
  • (modified) llvm/test/CodeGen/AMDGPU/insert-waitcnts-exp.mir (+8-8)
  • (modified) llvm/test/CodeGen/AMDGPU/invert-br-undef-vcc.mir (+4-4)
  • (modified) llvm/test/CodeGen/AMDGPU/lds-dma-waitcnt.mir (+16-16)
  • (modified) llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-constants.ll (+1-1)
  • (modified) llvm/test/CodeGen/AMDGPU/memory-legalizer-local.mir (+46-46)
  • (modified) llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir (+2-2)
  • (modified) llvm/test/CodeGen/AMDGPU/memory-legalizer-region.mir (+46-46)
  • (modified) llvm/test/CodeGen/AMDGPU/merge-flat-with-global-load-store.mir (+29-29)
  • (modified) llvm/test/CodeGen/AMDGPU/merge-global-load-store.mir (+179-179)
  • (modified) llvm/test/CodeGen/AMDGPU/merge-load-store-agpr.mir (+16-16)
  • (modified) llvm/test/CodeGen/AMDGPU/merge-out-of-order-ldst.mir (+7-7)
  • (modified) llvm/test/CodeGen/AMDGPU/optimize-if-exec-masking.mir (+1-1)
  • (modified) llvm/test/CodeGen/AMDGPU/phi-elimination-end-cf.mir (+1-1)
  • (modified) llvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll (+1-1)
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-divrem.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-divrem.mir
index 245e740ed8100..8af27835d6eeb 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-divrem.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-divrem.mir
@@ -316,8 +316,8 @@ body: |
     ; CHECK-NEXT: %ptr2:_(p1) = G_IMPLICIT_DEF
     ; CHECK-NEXT: %ptr3:_(p1) = COPY $vgpr2_vgpr3
     ; CHECK-NEXT: %ptr4:_(p1) = COPY $vgpr4_vgpr5
-    ; CHECK-NEXT: G_STORE %src1(s32), %ptr1(p1) :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
-    ; CHECK-NEXT: G_STORE %src2(s32), %ptr2(p1) :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
+    ; CHECK-NEXT: G_STORE %src1(s32), %ptr1(p1) :: (volatile store (s32) into `ptr addrspace(1) poison`, addrspace 1)
+    ; CHECK-NEXT: G_STORE %src2(s32), %ptr2(p1) :: (volatile store (s32) into `ptr addrspace(1) poison`, addrspace 1)
     ; CHECK-NEXT: %div:_(s32), %rem:_ = G_SDIVREM %src1, %src2
     ; CHECK-NEXT: G_STORE %div(s32), %ptr3(p1) :: (store (s32), addrspace 1)
     ; CHECK-NEXT: G_STORE %rem(s32), %ptr4(p1) :: (store (s32), addrspace 1)
@@ -327,8 +327,8 @@ body: |
     %ptr2:_(p1) = G_IMPLICIT_DEF
     %ptr3:_(p1) = COPY $vgpr2_vgpr3
     %ptr4:_(p1) = COPY $vgpr4_vgpr5
-    G_STORE %src1:_(s32), %ptr1:_(p1) :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
-    G_STORE %src2:_(s32), %ptr2:_(p1) :: (volatile store (s32) into `ptr addrspace(1) undef`, addrspace 1)
+    G_STORE %src1:_(s32), %ptr1:_(p1) :: (volatile store (s32) into `ptr addrspace(1) poison`, addrspace 1)
+    G_STORE %src2:_(s32), %ptr2:_(p1) :: (volatile store (s32) into `ptr addrspace(1) poison`, addrspace 1)
     %div:_(s32) = G_SDIV %src1:_(s32), %src2:_(s32)
     G_STORE %div:_(s32), %ptr3:_(p1) :: (store (s32), addrspace 1, align 4)
     %rem:_(s32) = G_SREM %src1:_(s32), %src2:_(s32)
diff --git a/llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir b/llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir
index b427b011f5051..5f0f2dd1e8b08 100644
--- a/llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir
+++ b/llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir
@@ -33,7 +33,7 @@
     br i1 %tmp3.inv, label %bb4, label %bb8, !amdgpu.uniform !2
 
   bb4:                                              ; preds = %bb
-    %tmp5 = load volatile float, ptr addrspace(1) undef, align 4
+    %tmp5 = load volatile float, ptr addrspace(1) poison, align 4
     %tmp6 = fcmp oeq float %tmp5, 0x7FF0000000000000
     br i1 %tmp6, label %bb7, label %Flow, !amdgpu.uniform !2
 
@@ -103,7 +103,7 @@ body:             |
     renamable $sgpr4_sgpr5 = IMPLICIT_DEF
     $vgpr0 = V_MOV_B32_e32 $sgpr4, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr4_sgpr5
     $vgpr1 = V_MOV_B32_e32 $sgpr5, implicit $exec, implicit killed $sgpr4_sgpr5, implicit $exec
-    renamable $vgpr0 = GLOBAL_LOAD_DWORD killed renamable $vgpr0_vgpr1, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) undef`, addrspace 1)
+    renamable $vgpr0 = GLOBAL_LOAD_DWORD killed renamable $vgpr0_vgpr1, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) poison`, addrspace 1)
     renamable $sgpr4 = S_MOV_B32 2139095040
     S_WAITCNT 3952
     renamable $sgpr4_sgpr5 = nofpexcept V_CMP_NEQ_F32_e64 0, killed $sgpr4, 0, killed $vgpr0, 0, implicit $mode, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir b/llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
index c656de046fd79..6626a6983323f 100644
--- a/llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
+++ b/llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
@@ -128,6 +128,6 @@ body:             |
     %28:vgpr_32 = IMAGE_LOAD_V1_V4 killed %25, killed %27, 2, -1, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s128) from constant-pool, addrspace 4)
     %29:vgpr_32 = nofpexcept V_ADD_F32_e32 0, killed %28, implicit $mode, implicit $exec
     $m0 = S_MOV_B32 -1
-    DS_WRITE_B32 undef %30:vgpr_32, killed %29, 0, 0, implicit $m0, implicit $exec :: (store (s32) into `ptr addrspace(3) undef`, addrspace 3)
+    DS_WRITE_B32 undef %30:vgpr_32, killed %29, 0, 0, implicit $m0, implicit $exec :: (store (s32) into `ptr addrspace(3) poison`, addrspace 3)
     S_ENDPGM 0
 ...
diff --git a/llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir b/llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
index 919641f7e70d3..a9ca2cd35a6cd 100644
--- a/llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
+++ b/llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
@@ -2,104 +2,104 @@
 # RUN: llc --mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs -passes si-fold-operands,si-shrink-instructions %s -o - | FileCheck %s
 --- |
   define amdgpu_kernel void @add_f32_1.0_one_f16_use() #0 {
-    %f16.val0 = load volatile half, ptr addrspace(1) undef
-    %f16.val1 = load volatile half, ptr addrspace(1) undef
-    %f32.val = load volatile float, ptr addrspace(1) undef
+    %f16.val0 = load volatile half, ptr addrspace(1) poison
+    %f16.val1 = load volatile half, ptr addrspace(1) poison
+    %f32.val = load volatile float, ptr addrspace(1) poison
     %f16.add0 = fadd half %f16.val0, 0xH3C00
     %f32.add = fadd float %f32.val, 1.000000e+00
-    store volatile half %f16.add0, ptr addrspace(1) undef
-    store volatile float %f32.add, ptr addrspace(1) undef
+    store volatile half %f16.add0, ptr addrspace(1) poison
+    store volatile float %f32.add, ptr addrspace(1) poison
     ret void
   }
 
   define amdgpu_kernel void @add_f32_1.0_multi_f16_use() #0 {
-    %f16.val0 = load volatile half, ptr addrspace(1) undef
-    %f16.val1 = load volatile half, ptr addrspace(1) undef
-    %f32.val = load volatile float, ptr addrspace(1) undef
+    %f16.val0 = load volatile half, ptr addrspace(1) poison
+    %f16.val1 = load volatile half, ptr addrspace(1) poison
+    %f32.val = load volatile float, ptr addrspace(1) poison
     %f16.add0 = fadd half %f16.val0, 0xH3C00
     %f32.add = fadd float %f32.val, 1.000000e+00
-    store volatile half %f16.add0, ptr addrspace(1) undef
-    store volatile float %f32.add, ptr addrspace(1) undef
+    store volatile half %f16.add0, ptr addrspace(1) poison
+    store volatile float %f32.add, ptr addrspace(1) poison
     ret void
   }
 
   define amdgpu_kernel void @add_f32_1.0_one_f32_use_one_f16_use () #0 {
-    %f16.val0 = load volatile half, ptr addrspace(1) undef
-    %f16.val1 = load volatile half, ptr addrspace(1) undef
-    %f32.val = load volatile float, ptr addrspace(1) undef
+    %f16.val0 = load volatile half, ptr addrspace(1) poison
+    %f16.val1 = load volatile half, ptr addrspace(1) poison
+    %f32.val = load volatile float, ptr addrspace(1) poison
     %f16.add0 = fadd half %f16.val0, 0xH3C00
     %f32.add = fadd float %f32.val, 1.000000e+00
-    store volatile half %f16.add0, ptr addrspace(1) undef
-    store volatile float %f32.add, ptr addrspace(1) undef
+    store volatile half %f16.add0, ptr addrspace(1) poison
+    store volatile float %f32.add, ptr addrspace(1) poison
     ret void
   }
 
   define amdgpu_kernel void @add_f32_1.0_one_f32_use_multi_f16_use () #0 {
-    %f16.val0 = load volatile half, ptr addrspace(1) undef
-    %f16.val1 = load volatile half, ptr addrspace(1) undef
-    %f32.val = load volatile float, ptr addrspace(1) undef
+    %f16.val0 = load volatile half, ptr addrspace(1) poison
+    %f16.val1 = load volatile half, ptr addrspace(1) poison
+    %f32.val = load volatile float, ptr addrspace(1) poison
     %f16.add0 = fadd half %f16.val0, 0xH3C00
     %f16.add1 = fadd half %f16.val1, 0xH3C00
     %f32.add = fadd float %f32.val, 1.000000e+00
-    store volatile half %f16.add0, ptr addrspace(1) undef
-    store volatile half %f16.add1, ptr addrspace(1) undef
-    store volatile float %f32.add, ptr addrspace(1) undef
+    store volatile half %f16.add0, ptr addrspace(1) poison
+    store volatile half %f16.add1, ptr addrspace(1) poison
+    store volatile float %f32.add, ptr addrspace(1) poison
     ret void
   }
 
   define amdgpu_kernel void @add_i32_1_multi_f16_use() #0 {
-    %f16.val0 = load volatile half, ptr addrspace(1) undef
-    %f16.val1 = load volatile half, ptr addrspace(1) undef
+    %f16.val0 = load volatile half, ptr addrspace(1) poison
+    %f16.val1 = load volatile half, ptr addrspace(1) poison
     %f16.add0 = fadd half %f16.val0, 0xH0001
     %f16.add1 = fadd half %f16.val1, 0xH0001
-    store volatile half %f16.add0, ptr addrspace(1) undef
-    store volatile half %f16.add1,ptr addrspace(1) undef
+    store volatile half %f16.add0, ptr addrspace(1) poison
+    store volatile half %f16.add1,ptr addrspace(1) poison
     ret void
   }
 
   define amdgpu_kernel void @add_i32_m2_one_f32_use_multi_f16_use () #0 {
-    %f16.val0 = load volatile half, ptr addrspace(1) undef
-    %f16.val1 = load volatile half, ptr addrspace(1) undef
-    %f32.val = load volatile float, ptr addrspace(1) undef
+    %f16.val0 = load volatile half, ptr addrspace(1) poison
+    %f16.val1 = load volatile half, ptr addrspace(1) poison
+    %f32.val = load volatile float, ptr addrspace(1) poison
     %f16.add0 = fadd half %f16.val0, 0xHFFFE
     %f16.add1 = fadd half %f16.val1, 0xHFFFE
     %f32.add = fadd float %f32.val, 0xffffffffc0000000
-    store volatile half %f16.add0, ptr addrspace(1) undef
-    store volatile half %f16.add1, ptr addrspace(1) undef
-    store volatile float %f32.add, ptr addrspace(1) undef
+    store volatile half %f16.add0, ptr addrspace(1) poison
+    store volatile half %f16.add1, ptr addrspace(1) poison
+    store volatile float %f32.add, ptr addrspace(1) poison
     ret void
   }
 
   define amdgpu_kernel void @add_f16_1.0_multi_f32_use() #0 {
-    %f32.val0 = load volatile float, ptr addrspace(1) undef
-    %f32.val1 = load volatile float, ptr addrspace(1) undef
-    %f32.val = load volatile float, ptr addrspace(1) undef
+    %f32.val0 = load volatile float, ptr addrspace(1) poison
+    %f32.val1 = load volatile float, ptr addrspace(1) poison
+    %f32.val = load volatile float, ptr addrspace(1) poison
     %f32.add0 = fadd float %f32.val0, 1.0
     %f32.add1 = fadd float %f32.val1, 1.0
-    store volatile float %f32.add0, ptr addrspace(1) undef
-    store volatile float %f32.add1, ptr addrspace(1) undef
+    store volatile float %f32.add0, ptr addrspace(1) poison
+    store volatile float %f32.add1, ptr addrspace(1) poison
     ret void
   }
 
   define amdgpu_kernel void @add_f16_1.0_other_high_bits_multi_f16_use() #0 {
-    %f16.val0 = load volatile half, ptr addrspace(1) undef
-    %f16.val1 = load volatile half, ptr addrspace(1) undef
-    %f32.val = load volatile half, ptr addrspace(1) undef
+    %f16.val0 = load volatile half, ptr addrspace(1) poison
+    %f16.val1 = load volatile half, ptr addrspace(1) poison
+    %f32.val = load volatile half, ptr addrspace(1) poison
     %f16.add0 = fadd half %f16.val0, 0xH3C00
     %f32.add = fadd half %f32.val, 1.000000e+00
-    store volatile half %f16.add0, ptr addrspace(1) undef
-    store volatile half %f32.add, ptr addrspace(1) undef
+    store volatile half %f16.add0, ptr addrspace(1) poison
+    store volatile half %f32.add, ptr addrspace(1) poison
     ret void
   }
 
   define amdgpu_kernel void @add_f16_1.0_other_high_bits_use_f16_f32() #0 {
-    %f16.val0 = load volatile half, ptr addrspace(1) undef
-    %f16.val1 = load volatile half, ptr addrspace(1) undef
-    %f32.val = load volatile half, ptr addrspace(1) undef
+    %f16.val0 = load volatile half, ptr addrspace(1) poison
+    %f16.val1 = load volatile half, ptr addrspace(1) poison
+    %f32.val = load volatile half, ptr addrspace(1) poison
     %f16.add0 = fadd half %f16.val0, 0xH3C00
     %f32.add = fadd half %f32.val, 1.000000e+00
-    store volatile half %f16.add0, ptr addrspace(1) undef
-    store volatile half %f32.add, ptr addrspace(1) undef
+    store volatile half %f16.add0, ptr addrspace(1) poison
+    store volatile half %f32.add, ptr addrspace(1) poison
     ret void
   }
 
@@ -159,10 +159,10 @@ body:             |
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
     %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) undef`)
+    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
     %12 = V_MOV_B32_e32 1065353216, implicit $exec
     %13 = V_ADD_F16_e64 0, killed %11, 0, %12, 0, 0, implicit $mode, implicit $exec
-    BUFFER_STORE_SHORT_OFFSET killed %13, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) undef`)
+    BUFFER_STORE_SHORT_OFFSET killed %13, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) poison`)
     S_ENDPGM 0
 
 ...
@@ -222,13 +222,13 @@ body:             |
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
     %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) undef`)
-    %12 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) undef`)
+    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
+    %12 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) poison`)
     %13 = V_MOV_B32_e32 1065353216, implicit $exec
     %14 = V_ADD_F16_e64 0, killed %11, 0, %13, 0, 0, implicit $mode, implicit $exec
     %15 = V_ADD_F16_e64 0, killed %12, 0, killed %13, 0, 0, implicit $mode, implicit $exec
-    BUFFER_STORE_SHORT_OFFSET killed %14, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) undef`)
-    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) undef`)
+    BUFFER_STORE_SHORT_OFFSET killed %14, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) poison`)
+    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) poison`)
     S_ENDPGM 0
 
 ...
@@ -289,14 +289,14 @@ body:             |
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
     %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) undef`)
-    %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) undef`)
-    %13 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) undef`)
+    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
+    %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
+    %13 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) poison`)
     %14 = V_MOV_B32_e32 1065353216, implicit $exec
     %15 = V_ADD_F16_e64 0, %11, 0, %14, 0, 0, implicit $mode, implicit $exec
     %16 = V_ADD_F32_e64 0, killed %13, 0, killed %14, 0, 0, implicit $mode, implicit $exec
-    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) undef`)
-    BUFFER_STORE_DWORD_OFFSET killed %16, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s32) into `ptr addrspace(1) undef`)
+    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) poison`)
+    BUFFER_STORE_DWORD_OFFSET killed %16, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s32) into `ptr addrspace(1) poison`)
     S_ENDPGM 0
 
 ...
@@ -359,16 +359,16 @@ body:             |
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
     %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) undef`)
-    %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) undef`)
-    %13 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) undef`)
+    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
+    %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
+    %13 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) poison`)
     %14 = V_MOV_B32_e32 1065353216, implicit $exec
     %15 = V_ADD_F16_e64 0, %11, 0, %14, 0, 0, implicit $mode, implicit $exec
     %16 = V_ADD_F16_e64 0, %12, 0, %14, 0, 0, implicit $mode, implicit $exec
     %17 = V_ADD_F32_e64 0, killed %13, 0, killed %14, 0, 0, implicit $mode, implicit $exec
-    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) undef`)
-    BUFFER_STORE_SHORT_OFFSET killed %16, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) undef`)
-    BUFFER_STORE_DWORD_OFFSET killed %17, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s32) into `ptr addrspace(1) undef`)
+    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) poison`)
+    BUFFER_STORE_SHORT_OFFSET killed %16, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) poison`)
+    BUFFER_STORE_DWORD_OFFSET killed %17, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s32) into `ptr addrspace(1) poison`)
     S_ENDPGM 0
 
 ...
@@ -425,13 +425,13 @@ body:             |
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
     %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) undef`)
-    %12 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) undef`)
+    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
+    %12 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) poison`)
     %13 = V_MOV_B32_e32 1, implicit $exec
     %14 = V_ADD_F16_e64 0, killed %11, 0, %13, 0, 0, implicit $mode, implicit $exec
     %15 = V_ADD_F16_e64 0, killed %12, 0, killed %13, 0, 0, implicit $mode, implicit $exec
-    BUFFER_STORE_SHORT_OFFSET killed %14, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) undef`)
-    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) undef`)
+    BUFFER_STORE_SHORT_OFFSET killed %14, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) poison`)
+    BUFFER_STORE_SHORT_OFFSET killed %15, %10, 0, 0, 0, 0, implicit $exec :: (volatile store (s16) into `ptr addrspace(1) poison`)
     S_ENDPGM 0
 
 ...
@@ -491,16 +491,16 @@ body:             |
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
     %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
-    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) undef`)
-    %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) undef`)
-    %13 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) undef`)
+    %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
+    %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
+    %13 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile l...
[truncated]

@arsenm arsenm force-pushed the users/arsenm/amdgpu/tests-replace-some-p5-undef-with-poison branch from eefec53 to f72f925 Compare March 13, 2025 08:56
@arsenm arsenm force-pushed the users/arsenm/amdgpu/tests-replace-more-undef-ptr-with-poison branch from a20e042 to a0de19d Compare March 13, 2025 08:56
@arsenm arsenm force-pushed the users/arsenm/amdgpu/tests-replace-some-p5-undef-with-poison branch from f72f925 to f8736a4 Compare March 13, 2025 09:03
@arsenm arsenm force-pushed the users/arsenm/amdgpu/tests-replace-more-undef-ptr-with-poison branch from a0de19d to dac4c0e Compare March 13, 2025 09:03
@arsenm arsenm marked this pull request as ready for review March 13, 2025 09:09
@arsenm arsenm mentioned this pull request Mar 13, 2025
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@arsenm arsenm force-pushed the users/arsenm/amdgpu/tests-replace-some-p5-undef-with-poison branch from f8736a4 to 054d80a Compare March 13, 2025 11:56
@arsenm arsenm force-pushed the users/arsenm/amdgpu/tests-replace-more-undef-ptr-with-poison branch from dac4c0e to 2e4885a Compare March 13, 2025 11:57
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pravinjagtap approved these changes Mar 13, 2025
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LGTM

@arsenm arsenm force-pushed the users/arsenm/amdgpu/tests-replace-some-p5-undef-with-poison branch from 054d80a to 94e7a51 Compare March 13, 2025 13:12
@arsenm arsenm force-pushed the users/arsenm/amdgpu/tests-replace-more-undef-ptr-with-poison branch 2 times, most recently from 1e888ed to 7251260 Compare March 14, 2025 01:35
@arsenm arsenm force-pushed the users/arsenm/amdgpu/tests-replace-some-p5-undef-with-poison branch from 94e7a51 to 57c8112 Compare March 14, 2025 01:35
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  • Mar 13, 10:46 PM EDT: A user started a stack merge that includes this pull request via Graphite.
  • Mar 13, 10:51 PM EDT: Graphite rebased this pull request as part of a merge.
  • Mar 13, 10:53 PM EDT: A user merged this pull request with Graphite.

@arsenm arsenm force-pushed the users/arsenm/amdgpu/tests-replace-some-p5-undef-with-poison branch from 57c8112 to 652cead Compare March 14, 2025 02:48
Base automatically changed from users/arsenm/amdgpu/tests-replace-some-p5-undef-with-poison to main March 14, 2025 02:50
@arsenm arsenm force-pushed the users/arsenm/amdgpu/tests-replace-more-undef-ptr-with-poison branch from 7251260 to 87664c3 Compare March 14, 2025 02:51
@arsenm arsenm merged commit 06c379a into main Mar 14, 2025
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@arsenm arsenm deleted the users/arsenm/amdgpu/tests-replace-more-undef-ptr-with-poison branch March 14, 2025 02:53
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frederik-h pushed a commit to frederik-h/llvm-project that referenced this pull request Mar 18, 2025
@arsenm @frederik-h
AMDGPU: Replace more undef test pointer uses with poison (llvm#131102)
118e50b
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@jayfoad jayfoad Awaiting requested review from jayfoad

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