AMDGPU: Use generated checks in coalescer_distribute.ll

[arsenm]

Also replace the undef with poison.

[arsenm]

• AMDGPU: Switch simplifydemandedbits-recursion.ll to generated checks #131317
• AMDGPU: Switch scheduler-subrange-crash.ll to generated checks #131316
• AMDGPU: Switch test to generated checks #131315
• AMDGPU: Migrate more tests away from undef #131314
• AMDGPU: Migrate some tests away from undef #131277
• AMDGPU: Use generated checks in coalescer_distribute.ll #131276 👈 (View in Graphite)
• AMDGPU: Use generated checks in unchecked test #131275
• AMDGPU: Use generated tests in reg-coalescer-sched-crash.ll test #131259
• AMDGPU: Add generated checks to compile only test #131258
• AMDGPU: Switch a test to generated checks which only tested labels #131257
• AMDGPU: Remove undef in subreg-coalescer-crash.ll #131256
• AMDGPU: Switch a test with only function label checks to generated #131255
• AMDGPU: Replace undef references with poison in some MIR tests #131254
• AMDGPU: Use generated checks in test missing checks #131110
• AMDGPU: Replace some test undef uses with poison #131103
• AMDGPU: Replace more undef test pointer uses with poison #131102
• AMDGPU: Replace test uses of ptr addrspace(5) undef with poison #131101
• AMDGPU: Replace ptr addrspace(4) undef uses with poison in tests #131095
• AMDGPU: Replace some test i32 undef uses with poison #131092 : 1 other dependent PR (#131106 )
• AMDGPU: Replace some float undef test uses with poison #131090
• AMDGPU: Replace i16 undefs with poison in tests #131084
• AMDGPU: Replace half undef uses with poison in tests #131083
• main

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[llvmbot]

@llvm/pr-subscribers-backend-amdgpu

Author: Matt Arsenault (arsenm)

Changes

Also replace the undef with poison.

---

Full diff: https://github.com/llvm/llvm-project/pull/131276.diff

1 Files Affected:

• (modified) llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll (+25-2)

diff --git a/llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll b/llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
index 8f4d10411ed73..d07cc84865bea 100644
--- a/llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
+++ b/llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
@@ -1,8 +1,31 @@
-; RUN: llc -mtriple=amdgcn-- -verify-machineinstrs -o /dev/null %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn-- -mcpu=tahiti < %s | FileCheck %s
+
 ; This testcase produces a situation with unused value numbers in subregister
 ; liveranges that get distributed by ConnectedVNInfoEqClasses.
 
 define amdgpu_kernel void @hoge(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4) {
+; CHECK-LABEL: hoge:
+; CHECK:       ; %bb.0: ; %bb
+; CHECK-NEXT:    s_load_dword s2, s[4:5], 0x9
+; CHECK-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0
+; CHECK-NEXT:    s_waitcnt lgkmcnt(0)
+; CHECK-NEXT:    s_bitcmp1_b32 s2, 0
+; CHECK-NEXT:    s_cselect_b64 s[0:1], -1, 0
+; CHECK-NEXT:    s_and_b64 s[4:5], s[0:1], vcc
+; CHECK-NEXT:    s_and_saveexec_b64 s[0:1], s[4:5]
+; CHECK-NEXT:    s_or_b64 exec, exec, s[0:1]
+; CHECK-NEXT:    s_bitcmp1_b32 s2, 24
+; CHECK-NEXT:    s_cselect_b64 s[0:1], -1, 0
+; CHECK-NEXT:    s_xor_b64 s[0:1], s[0:1], -1
+; CHECK-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[0:1]
+; CHECK-NEXT:    v_cmp_ne_u32_e64 s[0:1], 1, v0
+; CHECK-NEXT:  .LBB0_1: ; %bb25
+; CHECK-NEXT:    ; =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    s_and_b64 vcc, exec, s[0:1]
+; CHECK-NEXT:    s_cbranch_vccnz .LBB0_1
+; CHECK-NEXT:  ; %bb.2: ; %bb30
+; CHECK-NEXT:    s_endpgm
 bb:
   %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
   br i1 %c0, label %bb2, label %bb23
@@ -11,7 +34,7 @@ bb2:
   br i1 %c1, label %bb6, label %bb8
 
 bb6:
-  %tmp7 = or i64 undef, undef
+  %tmp7 = or i64 poison, poison
   br label %bb8
 
 bb8:

[arsenm]

Merge activity

• Mar 14, 7:10 AM EDT: A user started a stack merge that includes this pull request via Graphite.
• Mar 14, 7:18 AM EDT: Graphite rebased this pull request as part of a merge.
• Mar 14, 7:21 AM EDT: A user merged this pull request with Graphite.