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AMDGPU: Remove undef in subreg-coalescer-crash.ll #131256
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arsenm
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Mar 14, 2025
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AMDGPU: Remove undef in subreg-coalescer-crash.ll #131256
arsenm
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Mar 14, 2025
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@llvm/pr-subscribers-llvm-globalisel @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) ChangesFull diff: https://github.com/llvm/llvm-project/pull/131256.diff 1 Files Affected:
diff --git a/llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll b/llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
index a0ac6c1b28449..a69ee2e1a8b5c 100644
--- a/llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
+++ b/llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
@@ -9,17 +9,19 @@ define amdgpu_kernel void @row_filter_C1_D0() #0 {
; GCN-NEXT: ; %bb.1: ; %do.body.preheader
; GCN-NEXT: .LBB0_2: ; %for.inc.1
entry:
- br i1 undef, label %for.inc.1, label %do.body.preheader
+ br i1 poison, label %for.inc.1, label %do.body.preheader
do.body.preheader: ; preds = %entry
%tmp = insertelement <4 x i32> zeroinitializer, i32 poison, i32 1
- br i1 undef, label %do.body56.1, label %do.body90
+ %undef1 = freeze i1 poison
+ br i1 %undef1, label %do.body56.1, label %do.body90
do.body90: ; preds = %do.body56.2, %do.body56.1, %do.body.preheader
%tmp1 = phi <4 x i32> [ %tmp6, %do.body56.2 ], [ %tmp5, %do.body56.1 ], [ %tmp, %do.body.preheader ]
%tmp2 = insertelement <4 x i32> %tmp1, i32 poison, i32 2
%tmp3 = insertelement <4 x i32> %tmp2, i32 poison, i32 3
- br i1 undef, label %do.body124.1, label %do.body.1562.preheader
+ %undef3 = freeze i1 poison
+ br i1 %undef3, label %do.body124.1, label %do.body.1562.preheader
do.body.1562.preheader: ; preds = %do.body124.1, %do.body90
%storemerge = phi <4 x i32> [ %tmp3, %do.body90 ], [ %tmp7, %do.body124.1 ]
@@ -28,7 +30,7 @@ do.body.1562.preheader: ; preds = %do.body124.1, %do.b
do.body56.1: ; preds = %do.body.preheader
%tmp5 = insertelement <4 x i32> %tmp, i32 poison, i32 1
- %or.cond472.1 = or i1 undef, undef
+ %or.cond472.1 = or i1 poison, poison
br i1 %or.cond472.1, label %do.body56.2, label %do.body90
do.body56.2: ; preds = %do.body56.1
@@ -41,7 +43,8 @@ do.body124.1: ; preds = %do.body90
for.inc.1: ; preds = %do.body.1562.preheader, %entry
%storemerge591 = phi <4 x i32> [ zeroinitializer, %entry ], [ %storemerge, %do.body.1562.preheader ]
- %add.i495 = add <4 x i32> %storemerge591, undef
+ %undef2 = freeze <4 x i32> poison
+ %add.i495 = add <4 x i32> %storemerge591, %undef2
unreachable
}
@@ -68,24 +71,27 @@ define amdgpu_ps void @foo() #0 {
; GCN-NEXT: exp mrt0 v1, v0, v0, v0 done vm
; GCN-NEXT: s_endpgm
bb:
- br i1 undef, label %bb2, label %bb1
+ %undef0 = freeze i1 poison
+ br i1 %undef0, label %bb2, label %bb1
bb1: ; preds = %bb
- br i1 undef, label %bb4, label %bb6
+ %undef1 = freeze i1 poison
+ br i1 %undef1, label %bb4, label %bb6
bb2: ; preds = %bb4, %bb
%tmp = phi float [ %tmp5, %bb4 ], [ 0.000000e+00, %bb ]
- br i1 undef, label %bb9, label %bb13
+ br i1 poison, label %bb9, label %bb13
bb4: ; preds = %bb7, %bb6, %bb1
%tmp5 = phi float [ poison, %bb1 ], [ poison, %bb6 ], [ %tmp8, %bb7 ]
br label %bb2
bb6: ; preds = %bb1
- br i1 undef, label %bb7, label %bb4
+ %undef2 = freeze i1 poison
+ br i1 %undef2, label %bb7, label %bb4
bb7: ; preds = %bb6
- %tmp8 = fmul float undef, undef
+ %tmp8 = fmul float poison, poison
br label %bb4
bb9: ; preds = %bb2
@@ -95,7 +101,7 @@ bb9: ; preds = %bb2
br label %bb14
bb13: ; preds = %bb2
- br i1 undef, label %bb23, label %bb24
+ br i1 poison, label %bb23, label %bb24
bb14: ; preds = %bb27, %bb24, %bb9
%tmp15 = phi float [ %tmp12, %bb9 ], [ poison, %bb27 ], [ 0.000000e+00, %bb24 ]
@@ -106,11 +112,11 @@ bb14: ; preds = %bb27, %bb24, %bb9
ret void
bb23: ; preds = %bb13
- br i1 undef, label %bb24, label %bb26
+ br i1 poison, label %bb24, label %bb26
bb24: ; preds = %bb26, %bb23, %bb13
%tmp25 = phi float [ %tmp, %bb13 ], [ %tmp, %bb26 ], [ 0.000000e+00, %bb23 ]
- br i1 undef, label %bb27, label %bb14
+ br i1 poison, label %bb27, label %bb14
bb26: ; preds = %bb23
br label %bb24
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